[Icc-mot] Re: XGate support

[Edward Karpicz]

The answer is yes, ICC V7 and even V6 is enough to work with S12X. You just 
need an header file and you old code should compile quite easily. Old code 
should work, except for some nuisances:

1) different PPAGE's.
  a) PPAGE range is 0xE0-0xFF for S12XD512, paged memory setting 
0x380000.0x3FFFFF. 0x38-0x3F - for S12E128, paged memory setting 
0xE0000.0xFFFFF
  b) Different nonpaged area mapping. Nonpaged 0x4000.0x7FFF maps to 
last_page-1 (or the top most page minus 1) on S12. So nonpaged 0x4000.0x7FFF 
is mapped to PPAGE 0x3E on all S12. But in S12X, nonpaged 0x4000.0x7FFF maps 
to last_page-2, it's PPAGE=0xFD. Bla bla bla, S12 after reset has this 
nonpaged mapping:
0x4000.0x7FFF - PPAGE=lastpage(0x3F)-1=0x3E
0x8000.0xBFFF - PPAGE=0. PPAGE=0 in single chip mode is the same like the 
bottom most PPAGE, 0x38 for 128k S12 parts.
0xC000.0xFFFF - PPAGE=lastpage=0x3F

S12X:
0x4000.0x7FFF - PPAGE=lastpage-2=0xFD
0x8000.0xBFFF - PPAGE=lastpage-1=0xFE
0xC000.0xFFFF - PPAGE=lastpage=0xFF

Above may be important for Srecords converting.

2) Preemptive RTOSes should be upgraded due to 16bits CCR register and 
interrupt priorities. Interrupt priorities matter also here:

3) If you were using interrupt nesting, then be aware that CLI in ISR is not 
enough to interrupt an interrupt in S12X. Normally you adjust interrupt 
priorities in interrupt controller, then CLI in ISR's of interest. If you 
don't want to bother with interrupt controller, then you should clear higher 
CCRh bits.


Edward


> OK, let me start with a simpler question regarding the current status of 
> ICC12 V7:  If I upgrade my processor from an S12E128 to an S12XDP512, will 
> I be able to compile my original S12 code for the new target?
>
> Thanks,
> Jim
>
>
> Jim Fiocca wrote:
>> I was also wondering the current status of XGate support.  I went to the 
>> archive site and sorted by subject, but couldn't find anything about 
>> XGate - though I know it's been discussed on the list before.
>>
>> 1) Will the assembler recognize and assemble the new instructions for the 
>> main core?
>>
>> 2) Will the compiler use the new instructions?
>>
>> 3) Will there be a 2nd assembler for the XGate co-processor (I wouldn't 
>> expect a 2nd compiler)?
>>
>> Thanks,
>> Jim
>>
>>
>> Richard Man wrote:
>>> No further work has been done yet. We do not yet have the right 
>>> resources...
>>>
>>> At 02:09 PM 2/27/2008, you wrote:
>>>> What is the status on the XGate processors?
>>>>
>>>> Richard Man wrote:
>>>>> Change log excerpt:
>>>>> V7.04 - Feb 11th, 2008
>>>>>   IDE
>>>>>     - [ADV and PRO only] Added capability to create Library projects.
>>>>>   Compiler
>>>>>     - 7.03A did not generate calls to "uint2fp" for unsigned to FP
>>>>>       conversion
>>>>>     - the compiler was trashing 'D' for complicated indirect function
>>>>>       call, and thus may overwrite the first argument to the function. 
>>>>> e.g.
>>>>>           tab[i]->func(0);   // D overwritten
>>>>>   Header Files
>>>>>     - the DP512 header file was incorrect.
>>>
>>> // richard (This email is for mailing lists. To reach me directly, 
>>> please use richard at imagecraft.com)
>>> _______________________________________________
>>> Icc-mot mailing list
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>>
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