From peter at sensair.com Fri Oct 5 19:12:51 2007 From: peter at sensair.com (Peter Lissenburg) Date: Fri Oct 5 19:24:36 2007 Subject: [Icc-mot] uexec and XGATE chip In-Reply-To: <200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2> <200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> Message-ID: <4706EF23.5040600@sensair.com> Hi Richard and all, I'm starting to use the uexec code on an xgate chip. Finding a problem(s), that I have not tracked down yet, so I thought I'd ask if anyone has done this and solved this (unknown as yet!) problem. Thanks for any insights. Peter L. From ekarpicz at freemail.lt Sat Oct 6 11:59:25 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Sat Oct 6 12:11:44 2007 Subject: [Icc-mot] uexec and XGATE chip References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> Message-ID: <001001c8084b$039f4c80$a300a8c0@REKS> Peter Lissenburg wrote: > Hi Richard and all, > I'm starting to use the uexec code on an xgate chip. Finding a problem(s), > that I have not tracked down yet, so I thought I'd ask if anyone has done > this and solved this (unknown as yet!) problem. > Thanks for any insights. > Peter L. > > Hi Peter, S12X CCR is 16bits wide, while S12 CCR is 8bits wide. As a result interrupt stack frames do differ. This doesn't hurt anybody except when code has to manipulate interrupt stack frame. I found two "suspect places" in hc12.s file from examples12\uexec_dp256.zip, please search for "create an interrupt stack frame": ... _UEXC_SavregsAndResched:: ; first create an interrupt stack frame pshy pshx pshd ; what a concept, not A:B tpa anda #0xEF ; re-enable interrupt when it "returns" since psha ; Defer() disables interrupt ... In bottom three lines 8bit CCR is pushed to the stack. CCRh should be pushed next. CCRh holds interrupt priority level and it should be zero for foreground tasks. So add CLR 1,-SP after psha and it should get ported, I think. ... _UEXC_SavregsAndResched:: ; first create an interrupt stack frame pshy pshx pshd ; what a concept, not A:B tpa anda #0xEF ; re-enable interrupt when it "returns" since psha ; Defer() disables interrupt CLR 1,-SP ... ... _UEXC_StartNewTask:: lds _uexc_current_sp ; make KillSelf as the "return pc" of a new task, so if it ; ever returns, it will reclaim the storage ldd #_UEXC_KillSelf pshb psha ldd _uexc_current_func pshb psha ; create an interrupt stack frame pshy pshx pshd tpa anda #0xEF ; re-enable interrupt psha ; CLR 1,-SP ... Regards Edward From peter at sensair.com Sat Oct 6 20:36:36 2007 From: peter at sensair.com (Peter Lissenburg) Date: Sat Oct 6 20:48:21 2007 Subject: [Icc-mot] uexec and XGATE chip In-Reply-To: <001001c8084b$039f4c80$a300a8c0@REKS> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS> Message-ID: <47085444.9030404@sensair.com> Hi Edward, thanks for that, important point I had missed, although I should have questioned the extra stuff NoIce was showing me. Before the CLR 1,-SP should I not make another entry to modify? by psha ? I'll have a go and learn more.... Thanks. Peter L. Edward Karpicz wrote: > Peter Lissenburg wrote: > >> Hi Richard and all, >> I'm starting to use the uexec code on an xgate chip. Finding a >> problem(s), >> that I have not tracked down yet, so I thought I'd ask if anyone has done >> this and solved this (unknown as yet!) problem. >> Thanks for any insights. >> Peter L. >> >> > > Hi Peter, > > S12X CCR is 16bits wide, while S12 CCR is 8bits wide. As a result > interrupt stack frames do differ. This doesn't hurt anybody except when > code has to manipulate interrupt stack frame. I found two "suspect > places" in hc12.s file from examples12\uexec_dp256.zip, please search > for "create an interrupt stack frame": > > ... > _UEXC_SavregsAndResched:: > ; first create an interrupt stack frame > pshy > pshx > pshd ; what a concept, not A:B > tpa > anda #0xEF ; re-enable interrupt when it "returns" since > psha ; Defer() disables interrupt > ... > > In bottom three lines 8bit CCR is pushed to the stack. CCRh should be > pushed next. CCRh holds interrupt priority level and it should be zero > for foreground tasks. So add CLR 1,-SP after psha and it should get > ported, I think. > > ... > _UEXC_SavregsAndResched:: > ; first create an interrupt stack frame > pshy > pshx > pshd ; what a concept, not A:B > tpa > anda #0xEF ; re-enable interrupt when it "returns" since > psha ; Defer() disables interrupt > CLR 1,-SP > ... > > ... > _UEXC_StartNewTask:: > lds _uexc_current_sp > ; make KillSelf as the "return pc" of a new task, so if it > ; ever returns, it will reclaim the storage > ldd #_UEXC_KillSelf > pshb > psha > ldd _uexc_current_func > pshb > psha > ; create an interrupt stack frame > pshy > pshx > pshd > tpa > anda #0xEF ; re-enable interrupt > psha ; > CLR 1,-SP > ... > > > Regards > Edward > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > > > From peter at sensair.com Sun Oct 7 23:11:49 2007 From: peter at sensair.com (Peter Lissenburg) Date: Sun Oct 7 23:23:42 2007 Subject: [Icc-mot] uexec and XGATE chip In-Reply-To: <47085444.9030404@sensair.com> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS> <47085444.9030404@sensair.com> Message-ID: <4709CA25.3020101@sensair.com> Hi Edward, with ldaa #0 psha in those places you pointed out and all works fine. Now to keep my eyes open for other differences. Thanks for your help. Peter L. Peter Lissenburg wrote: > Hi Edward, > thanks for that, important point I had missed, although I should > have questioned the extra stuff NoIce was showing me. > Before the > CLR 1,-SP > should I not make another entry to modify? by > psha > ? > > I'll have a go and learn more.... > Thanks. > Peter L. > > > > Edward Karpicz wrote: >> Peter Lissenburg wrote: >> >>> Hi Richard and all, >>> I'm starting to use the uexec code on an xgate chip. Finding a >>> problem(s), >>> that I have not tracked down yet, so I thought I'd ask if anyone has >>> done >>> this and solved this (unknown as yet!) problem. >>> Thanks for any insights. >>> Peter L. >>> >>> >> >> Hi Peter, >> >> S12X CCR is 16bits wide, while S12 CCR is 8bits wide. As a result >> interrupt stack frames do differ. This doesn't hurt anybody except >> when code has to manipulate interrupt stack frame. I found two >> "suspect places" in hc12.s file from examples12\uexec_dp256.zip, >> please search for "create an interrupt stack frame": >> >> ... >> _UEXC_SavregsAndResched:: >> ; first create an interrupt stack frame >> pshy >> pshx >> pshd ; what a concept, not A:B >> tpa >> anda #0xEF ; re-enable interrupt when it "returns" since >> psha ; Defer() disables interrupt >> ... >> >> In bottom three lines 8bit CCR is pushed to the stack. CCRh should be >> pushed next. CCRh holds interrupt priority level and it should be zero >> for foreground tasks. So add CLR 1,-SP after psha and it should get >> ported, I think. >> >> ... >> _UEXC_SavregsAndResched:: >> ; first create an interrupt stack frame >> pshy >> pshx >> pshd ; what a concept, not A:B >> tpa >> anda #0xEF ; re-enable interrupt when it "returns" since >> psha ; Defer() disables interrupt >> CLR 1,-SP >> ... >> >> ... >> _UEXC_StartNewTask:: >> lds _uexc_current_sp >> ; make KillSelf as the "return pc" of a new task, so if it >> ; ever returns, it will reclaim the storage >> ldd #_UEXC_KillSelf >> pshb >> psha >> ldd _uexc_current_func >> pshb >> psha >> ; create an interrupt stack frame >> pshy >> pshx >> pshd >> tpa >> anda #0xEF ; re-enable interrupt >> psha ; >> CLR 1,-SP >> ... >> >> >> Regards >> Edward >> >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot >> >> >> > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > > > From ekarpicz at freemail.lt Mon Oct 8 03:51:45 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Mon Oct 8 04:03:41 2007 Subject: [Icc-mot] uexec and XGATE chip References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS><47085444.9030404@sensair.com> <4709CA25.3020101@sensair.com> Message-ID: <003401c80999$38559c00$0400a8c0@edvardo> Hi I'm glad you made it working. But "clr 1,-sp" would be nicer :-), just 2 cycles and 2 bytes. clra+psha takes 3 bus cycles. Regards Edward Peter Lissenburg wrote: > Hi Edward, > with > ldaa #0 > psha > in those places you pointed out and all works fine. > Now to keep my eyes open for other differences. > > Thanks for your help. > Peter L. > > > > Peter Lissenburg wrote: >> Hi Edward, >> thanks for that, important point I had missed, although I should have >> questioned the extra stuff NoIce was showing me. >> Before the >> CLR 1,-SP >> should I not make another entry to modify? by >> psha >> ? >> >> I'll have a go and learn more.... >> Thanks. >> Peter L. >> >> >> >> Edward Karpicz wrote: >>> Peter Lissenburg wrote: >>> >>>> Hi Richard and all, >>>> I'm starting to use the uexec code on an xgate chip. Finding a >>>> problem(s), >>>> that I have not tracked down yet, so I thought I'd ask if anyone has >>>> done >>>> this and solved this (unknown as yet!) problem. >>>> Thanks for any insights. >>>> Peter L. >>>> >>>> >>> >>> Hi Peter, >>> >>> S12X CCR is 16bits wide, while S12 CCR is 8bits wide. As a result >>> interrupt stack frames do differ. This doesn't hurt anybody except when >>> code has to manipulate interrupt stack frame. I found two "suspect >>> places" in hc12.s file from examples12\uexec_dp256.zip, please search >>> for "create an interrupt stack frame": >>> >>> ... >>> _UEXC_SavregsAndResched:: >>> ; first create an interrupt stack frame >>> pshy >>> pshx >>> pshd ; what a concept, not A:B >>> tpa >>> anda #0xEF ; re-enable interrupt when it "returns" since >>> psha ; Defer() disables interrupt >>> ... >>> >>> In bottom three lines 8bit CCR is pushed to the stack. CCRh should be >>> pushed next. CCRh holds interrupt priority level and it should be zero >>> for foreground tasks. So add CLR 1,-SP after psha and it should get >>> ported, I think. >>> >>> ... >>> _UEXC_SavregsAndResched:: >>> ; first create an interrupt stack frame >>> pshy >>> pshx >>> pshd ; what a concept, not A:B >>> tpa >>> anda #0xEF ; re-enable interrupt when it "returns" since >>> psha ; Defer() disables interrupt >>> CLR 1,-SP >>> ... >>> >>> ... >>> _UEXC_StartNewTask:: >>> lds _uexc_current_sp >>> ; make KillSelf as the "return pc" of a new task, so if it >>> ; ever returns, it will reclaim the storage >>> ldd #_UEXC_KillSelf >>> pshb >>> psha >>> ldd _uexc_current_func >>> pshb >>> psha >>> ; create an interrupt stack frame >>> pshy >>> pshx >>> pshd >>> tpa >>> anda #0xEF ; re-enable interrupt >>> psha ; >>> CLR 1,-SP >>> ... >>> >>> >>> Regards >>> Edward >>> >>> _______________________________________________ >>> Icc-mot mailing list >>> Icc-mot@imagecraft.com >>> http://dragonsgate.net/mailman/listinfo/icc-mot >>> >>> >>> >> >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot >> >> >> > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot From peter at sensair.com Mon Oct 8 04:24:12 2007 From: peter at sensair.com (Peter Lissenburg) Date: Mon Oct 8 04:36:06 2007 Subject: [Icc-mot] uexec and XGATE chip In-Reply-To: <003401c80999$38559c00$0400a8c0@edvardo> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS><47085444.9030404@sensair.com> <4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> Message-ID: <470A135C.5020601@sensair.com> Good morning Edward, yes, I see what you mean. I wonder why it didn't seem to work? I must have had another problem that I fix at the same time, and didn't notice/can't remember or I typed it in wrong. Will check when I get a chance. Pete L Edward Karpicz wrote: > Hi > > I'm glad you made it working. But "clr 1,-sp" would be nicer :-), just > 2 cycles and 2 bytes. clra+psha takes 3 bus cycles. > > Regards > Edward > > > Peter Lissenburg wrote: >> Hi Edward, >> with >> ldaa #0 >> psha >> in those places you pointed out and all works fine. >> Now to keep my eyes open for other differences. >> >> Thanks for your help. >> Peter L. >> >> >> >> Peter Lissenburg wrote: >>> Hi Edward, >>> thanks for that, important point I had missed, although I should >>> have questioned the extra stuff NoIce was showing me. >>> Before the >>> CLR 1,-SP >>> should I not make another entry to modify? by >>> psha >>> ? >>> >>> I'll have a go and learn more.... >>> Thanks. >>> Peter L. >>> >>> >>> >>> Edward Karpicz wrote: >>>> Peter Lissenburg wrote: >>>> >>>>> Hi Richard and all, >>>>> I'm starting to use the uexec code on an xgate chip. Finding a >>>>> problem(s), >>>>> that I have not tracked down yet, so I thought I'd ask if anyone >>>>> has done >>>>> this and solved this (unknown as yet!) problem. >>>>> Thanks for any insights. >>>>> Peter L. >>>>> >>>>> >>>> >>>> Hi Peter, >>>> >>>> S12X CCR is 16bits wide, while S12 CCR is 8bits wide. As a result >>>> interrupt stack frames do differ. This doesn't hurt anybody except >>>> when code has to manipulate interrupt stack frame. I found two >>>> "suspect places" in hc12.s file from examples12\uexec_dp256.zip, >>>> please search for "create an interrupt stack frame": >>>> >>>> ... >>>> _UEXC_SavregsAndResched:: >>>> ; first create an interrupt stack frame >>>> pshy >>>> pshx >>>> pshd ; what a concept, not A:B >>>> tpa >>>> anda #0xEF ; re-enable interrupt when it "returns" since >>>> psha ; Defer() disables interrupt >>>> ... >>>> >>>> In bottom three lines 8bit CCR is pushed to the stack. CCRh should >>>> be pushed next. CCRh holds interrupt priority level and it should be >>>> zero for foreground tasks. So add CLR 1,-SP after psha and it should >>>> get ported, I think. >>>> >>>> ... >>>> _UEXC_SavregsAndResched:: >>>> ; first create an interrupt stack frame >>>> pshy >>>> pshx >>>> pshd ; what a concept, not A:B >>>> tpa >>>> anda #0xEF ; re-enable interrupt when it "returns" since >>>> psha ; Defer() disables interrupt >>>> CLR 1,-SP >>>> ... >>>> >>>> ... >>>> _UEXC_StartNewTask:: >>>> lds _uexc_current_sp >>>> ; make KillSelf as the "return pc" of a new task, so if it >>>> ; ever returns, it will reclaim the storage >>>> ldd #_UEXC_KillSelf >>>> pshb >>>> psha >>>> ldd _uexc_current_func >>>> pshb >>>> psha >>>> ; create an interrupt stack frame >>>> pshy >>>> pshx >>>> pshd >>>> tpa >>>> anda #0xEF ; re-enable interrupt >>>> psha ; >>>> CLR 1,-SP >>>> ... >>>> >>>> >>>> Regards >>>> Edward >>>> >>>> _______________________________________________ >>>> Icc-mot mailing list >>>> Icc-mot@imagecraft.com >>>> http://dragonsgate.net/mailman/listinfo/icc-mot >>>> >>>> >>>> >>> >>> _______________________________________________ >>> Icc-mot mailing list >>> Icc-mot@imagecraft.com >>> http://dragonsgate.net/mailman/listinfo/icc-mot >>> >>> >>> >> >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > > > From ekarpicz at freemail.lt Mon Oct 8 04:25:49 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Mon Oct 8 04:37:41 2007 Subject: [Icc-mot] uexec and XGATE chip References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS><47085444.9030404@sensair.com><4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> Message-ID: <000601c8099d$fa5159d0$0400a8c0@edvardo> Oops, fixing myself: clr 1.-sp ---------- = 2 bytes, 1 bus cycle clra psha ----------- = 2 bytes, 2 bus cycles ldaa #0 psha -------------- = 3 bytes, 2 bus cycles sorry for noise Edward ----- Original Message ----- From: "Edward Karpicz" To: "Discussion List for ICC08/11/12/16 users. You do NOT need tosubscribetoicc-announce if you are a member of this." Sent: Monday, October 08, 2007 1:51 PM Subject: Re: [Icc-mot] uexec and XGATE chip > Hi > > I'm glad you made it working. But "clr 1,-sp" would be nicer :-), just 2 > cycles and 2 bytes. clra+psha takes 3 bus cycles. > > Regards > Edward > > > Peter Lissenburg wrote: >> Hi Edward, >> with >> ldaa #0 >> psha >> in those places you pointed out and all works fine. >> Now to keep my eyes open for other differences. >> >> Thanks for your help. >> Peter L. >> >> >> >> Peter Lissenburg wrote: >>> Hi Edward, >>> thanks for that, important point I had missed, although I should >>> have questioned the extra stuff NoIce was showing me. >>> Before the >>> CLR 1,-SP >>> should I not make another entry to modify? by >>> psha >>> ? >>> >>> I'll have a go and learn more.... >>> Thanks. >>> Peter L. >>> >>> >>> >>> Edward Karpicz wrote: >>>> Peter Lissenburg wrote: >>>> >>>>> Hi Richard and all, >>>>> I'm starting to use the uexec code on an xgate chip. Finding a >>>>> problem(s), >>>>> that I have not tracked down yet, so I thought I'd ask if anyone has >>>>> done >>>>> this and solved this (unknown as yet!) problem. >>>>> Thanks for any insights. >>>>> Peter L. >>>>> >>>>> >>>> >>>> Hi Peter, >>>> >>>> S12X CCR is 16bits wide, while S12 CCR is 8bits wide. As a result >>>> interrupt stack frames do differ. This doesn't hurt anybody except when >>>> code has to manipulate interrupt stack frame. I found two "suspect >>>> places" in hc12.s file from examples12\uexec_dp256.zip, please search >>>> for "create an interrupt stack frame": >>>> >>>> ... >>>> _UEXC_SavregsAndResched:: >>>> ; first create an interrupt stack frame >>>> pshy >>>> pshx >>>> pshd ; what a concept, not A:B >>>> tpa >>>> anda #0xEF ; re-enable interrupt when it "returns" since >>>> psha ; Defer() disables interrupt >>>> ... >>>> >>>> In bottom three lines 8bit CCR is pushed to the stack. CCRh should be >>>> pushed next. CCRh holds interrupt priority level and it should be zero >>>> for foreground tasks. So add CLR 1,-SP after psha and it should get >>>> ported, I think. >>>> >>>> ... >>>> _UEXC_SavregsAndResched:: >>>> ; first create an interrupt stack frame >>>> pshy >>>> pshx >>>> pshd ; what a concept, not A:B >>>> tpa >>>> anda #0xEF ; re-enable interrupt when it "returns" since >>>> psha ; Defer() disables interrupt >>>> CLR 1,-SP >>>> ... >>>> >>>> ... >>>> _UEXC_StartNewTask:: >>>> lds _uexc_current_sp >>>> ; make KillSelf as the "return pc" of a new task, so if it >>>> ; ever returns, it will reclaim the storage >>>> ldd #_UEXC_KillSelf >>>> pshb >>>> psha >>>> ldd _uexc_current_func >>>> pshb >>>> psha >>>> ; create an interrupt stack frame >>>> pshy >>>> pshx >>>> pshd >>>> tpa >>>> anda #0xEF ; re-enable interrupt >>>> psha ; >>>> CLR 1,-SP >>>> ... >>>> >>>> >>>> Regards >>>> Edward >>>> >>>> _______________________________________________ >>>> Icc-mot mailing list >>>> Icc-mot@imagecraft.com >>>> http://dragonsgate.net/mailman/listinfo/icc-mot >>>> >>>> >>>> >>> >>> _______________________________________________ >>> Icc-mot mailing list >>> Icc-mot@imagecraft.com >>> http://dragonsgate.net/mailman/listinfo/icc-mot >>> >>> >>> >> >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot From peter at sensair.com Fri Oct 19 19:09:26 2007 From: peter at sensair.com (Peter Lissenburg) Date: Fri Oct 19 19:22:14 2007 Subject: [Icc-mot] ICC12 small bug? In-Reply-To: <000601c8099d$fa5159d0$0400a8c0@edvardo> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2><200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS><47085444.9030404@sensair.com><4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> <000601c8099d$fa5159d0$0400a8c0@edvardo> Message-ID: <47196356.7060405@sensair.com> Hi Richard, just a small thing, the IDE does not seem to save the state of the Options-Target-CPUtype Radio Box, correctly, when I set it to HCS12X, it reverts back to HCS12. (Version 7.03 Built Mar 21 2007 18:25:51) Cheers. Peter L. From richard-lists at imagecraft.com Fri Oct 19 22:07:54 2007 From: richard-lists at imagecraft.com (Richard) Date: Fri Oct 19 22:20:14 2007 Subject: [Icc-mot] ICC12 small bug? In-Reply-To: <47196356.7060405@sensair.com> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2> <200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS> <47085444.9030404@sensair.com> <4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> <000601c8099d$fa5159d0$0400a8c0@edvardo> <47196356.7060405@sensair.com> Message-ID: <200710200520.l9K5KDAf071472@dragonsgate2.imagecraft.com> Try 7.03A, I think that's one of the things that is fixed. In another news, we are in the process of adding the __far keyword, allowing paged functions to be called indirectly without limitations. Stay tuned... At 07:09 PM 10/19/2007, you wrote: >Hi Richard, > just a small thing, the IDE does not seem to save the state of the >Options-Target-CPUtype Radio Box, correctly, when I set it to HCS12X, it >reverts back to HCS12. >(Version 7.03 Built Mar 21 2007 18:25:51) >Cheers. >Peter L. > > > >_______________________________________________ >Icc-mot mailing list >Icc-mot@imagecraft.com >http://dragonsgate.net/mailman/listinfo/icc-mot // richard (This email is for mailing lists. To reach me directly, please use richard at imagecraft.com) From barryc at rjlsystems.com Sat Oct 20 09:31:22 2007 From: barryc at rjlsystems.com (Barry Callahan) Date: Sat Oct 20 09:44:07 2007 Subject: [Icc-mot] ICC12 small bug? In-Reply-To: <200710200520.l9K5KDAf071472@dragonsgate2.imagecraft.com> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2> <200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS> <47085444.9030404@sensair.com> <4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> <000601c8099d$fa5159d0$0400a8c0@edvardo> <47196356.7060405@sensair.com> <200710200520.l9K5KDAf071472@dragonsgate2.imagecraft.com> Message-ID: <471A2D5A.4040605@rjlsystems.com> > In another news, we are in the process of adding the __far keyword, > allowing paged functions to be called indirectly without limitations. > Stay tuned... > Yay! From dean.bell at flightec.com Sat Oct 20 12:00:39 2007 From: dean.bell at flightec.com (Dean Bell) Date: Tue Oct 23 20:27:33 2007 Subject: [Icc-mot] ICC12 small bug? In-Reply-To: <200710200520.l9K5KDAf071472@dragonsgate2.imagecraft.com> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2> <200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS> <47085444.9030404@sensair.com> <4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> <000601c8099d$fa5159d0$0400a8c0@edvardo> <47196356.7060405@sensair.com> <200710200520.l9K5KDAf071472@dragonsgate2.imagecraft.com> Message-ID: <012d01c8134b$81961230$1101a8c0@Technicaldesgnxp1b12e69c9632> Excellent news; thank you Richard. Dean. -----Original Message----- In another news, we are in the process of adding the __far keyword, allowing paged functions to be called indirectly without limitations. Stay tuned... From dean.bell at flightec.com Mon Oct 22 13:48:57 2007 From: dean.bell at flightec.com (Dean Bell) Date: Tue Oct 23 20:27:34 2007 Subject: [Icc-mot] ICC12 small bug? Message-ID: <014701c814ec$f82c9d90$1101a8c0@Technicaldesgnxp1b12e69c9632> Excellent news; thank you Richard. Dean. -----Original Message----- In another news, we are in the process of adding the __far keyword, allowing paged functions to be called indirectly without limitations. Stay tuned... -------------- next part -------------- An HTML attachment was scrubbed... URL: http://dragonsgate.net/pipermail/icc-mot/attachments/20071023/4dd67aa7/attachment.html From dean.bell at flightec.com Mon Oct 22 11:46:14 2007 From: dean.bell at flightec.com (Dean Bell) Date: Tue Oct 23 20:27:36 2007 Subject: [Icc-mot] ICC12 small bug? In-Reply-To: <471A2D5A.4040605@rjlsystems.com> References: <00cd01c7b9ab$02b5e610$6401a8c0@ddt2> <200706282040.l5SKe4xd099242@dragonsgate2.imagecraft.com> <06aa01c8020e$66846710$6901a8c0@ddt2> <200709282124.l8SLO7sp083844@dragonsgate2.imagecraft.com> <4706EF23.5040600@sensair.com> <001001c8084b$039f4c80$a300a8c0@REKS> <47085444.9030404@sensair.com> <4709CA25.3020101@sensair.com> <003401c80999$38559c00$0400a8c0@edvardo> <000601c8099d$fa5159d0$0400a8c0@edvardo> <47196356.7060405@sensair.com> <200710200520.l9K5KDAf071472@dragonsgate2.imagecraft.com> <471A2D5A.4040605@rjlsystems.com> Message-ID: <014001c814db$d2d77cb0$1101a8c0@Technicaldesgnxp1b12e69c9632> Excellent news; thank you Richard. Dean. -----Original Message----- In another news, we are in the process of adding the __far keyword, allowing paged functions to be called indirectly without limitations. Stay tuned...