[Icc-mot] 64 bits FP chip....

[Richard]

I am considering producing something like this:

64 bits FP support will be provided by the new iFPLightning chip. The 
product is integrated fully into our compilers (initially AVR but 
later on supporting other ICC compilers as well). The approximate 
performance goals are

1 uSec for 32 bit FP MUL
1.5 uSec for DIV
and ~2X for 64 bits.

This is at least 15x-20X faster than the equivalent AVR code and of 
course free up code space on the AVR chip.

The data transfer overheard is ~10 uSec to transfer two operands and 
a result. Complex expressions will use the intermediate results 
directly without data transfer. The API uses a stack architecture so 
interrupt can remain enabled except during the data transfer.

The iFPLightning chip comes in a 16 or 18 pin DIP module, ~0.7" x 0.6" in size.

The following pricing is very tentative, but is our best guess:

1-50            $30
100             $27
500             $25
1000            $22

It is highly likely that the chip will provide full high level math 
support such as sin/cos/etc. We are also open to other API such as DSP etc.

What do you think?

// richard <http://www.imagecraft.com> 
<http://www.dragonsgate.net/mailman/listinfo>