From richard at imagecraft.com Fri Mar 2 21:18:45 2007 From: richard at imagecraft.com (Richard) Date: Fri Mar 2 21:26:38 2007 Subject: [Icc-mot] (no subject) Message-ID: <6.1.0.6.2.20070302183943.076c7438@192.168.100.42> 2007 is setting out to be an interesting year at ImageCraft. We will continue to enhance our existing products of course: - new 8 bit optimizations for AVR and M8C (PRO version) - support for new devices in the AVR, MSP430, ARM, and S12X families. Including extended addressing for 430X. In addition, we have decided on the following new projects: - Microchip PIC24 port. The PIC24 is a new 16 bit family from Microchip. It has many advantages that comes with being a Microchip device without some of the earlier architectural limitations. As PIC16 users upgrading to larger parts, the PIC24 is a natural step up. - Propeller C. Propeller is a unique device from http://www.parallax.com. 8 32-bit CPUs on one chip. Think "no interrupt." Propeller C gives us an opportunity to - ARM7 Educational Kits. We are producing a complete education kit bundle with board, compiler, debugger, and course materials for some large universities. I expect variants of this kit will be made to address different unverisities' needs. - More flexible dongle scheme. We sold over 500 dongles last year. I have ideas on making them more flexible. Anyway, my brain is still somewhere out in the Pacific Ocean. That's for now. Thank you for your support. // richard From richard at imagecraft.com Mon Mar 19 02:04:23 2007 From: richard at imagecraft.com (Richard) Date: Mon Mar 19 01:12:41 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 Message-ID: <6.1.0.6.2.20070319020258.0b433358@192.168.100.42> http://www.imagecraft.com/pub/iccv712_v603_beta0.exe Readme excerpt: V7.03 IDE - Added S12XDP512 to device list - Added a "CPU Type" radio group for "Custom" device. - Revamped how the expanded memory is used. Expanded memory is always enabled for HCS12 and S12X devices. - expanded memory uses either "-maps1" or "-maps12x" in linker flags, depending on the CPU type. - Added edit box to enter "INITRM" value for SRAM relocation. This will also link in the crt12initrm.o startup file instead of the default crt12.o Assembler - XGate support broke some processing in the CPU12 instruction processing. Fixed. Linker - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF window - Added -maps12x, maps 0x4000.0x7FFF as last_page in the 0x4000.0x7FFF window. // richard On-line orders, support, and listservers available on web site. [ For technical support on ImageCraft products, please include all previous replies in your msgs. ] From ekarpicz at freemail.lt Mon Mar 19 01:34:35 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Mon Mar 19 02:04:40 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 References: <6.1.0.6.2.20070319020258.0b433358@192.168.100.42> Message-ID: <000d01c76a09$cfb935a0$0400a8c0@edvardo> probably "v703" in the url, not "v603" http://www.imagecraft.com/pub/iccv712_v703_beta0.exe Edward ----- Original Message ----- From: "Richard" To: Sent: Monday, March 19, 2007 12:04 PM Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 > http://www.imagecraft.com/pub/iccv712_v603_beta0.exe > > Readme excerpt: > V7.03 > IDE > - Added S12XDP512 to device list > - Added a "CPU Type" radio group for "Custom" device. > - Revamped how the expanded memory is used. Expanded memory is always > enabled for HCS12 and S12X devices. > - expanded memory uses either "-maps1" or "-maps12x" in linker flags, > depending on the CPU type. > - Added edit box to enter "INITRM" value for SRAM relocation. This > will also link in the crt12initrm.o startup file instead of the > default crt12.o > Assembler > - XGate support broke some processing in the CPU12 instruction > processing. > Fixed. > Linker > - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF > window > - Added -maps12x, maps 0x4000.0x7FFF as last_page in the > 0x4000.0x7FFF window. > > > // richard > On-line orders, support, and > listservers available on web site. > [ For technical support on ImageCraft products, please include all > previous replies in your msgs. ] > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > From ekarpicz at freemail.lt Mon Mar 19 23:13:20 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Tue Mar 20 02:48:48 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 References: <6.1.0.6.2.20070319020258.0b433358@192.168.100.42> <000d01c76a09$cfb935a0$0400a8c0@edvardo> Message-ID: <000a01c76abf$3e2fb440$0400a8c0@edvardo> Trying again Some issues with this beta: 1) When INITRM editbox isn't blank I'm getting this !ERROR Cannot open file 'crt12initrm.o' in library path(s) Ok, this can be easily fixed by picking crtinitrm.s from libsrc.zip and compiling it to *.o file in \lib folder. 2) Something's wrong with 4000-7fff remapping for S12 derivatives. I have code consisting just of void main(void){}. It compiles ant links to S20F0E8000CF200016402B87CE04008E0B S2110E800B040027056A000820F6CE4030CD92 S2120E801804008E40302706180A307020F5162B S2080E8026402A20FEBB S2050E802A3D05 S2090E802B1D0016073DC6 No matter is it Custom HCS12, D64 or D128, s19 is always the same. 0x4000 addresses are being translated to 0xE8000 (ppage=$3a). They should be moved to 0xF8000 (ppage=$3e). 3) HCS12X translation of $4000 to lastpage-2 seems being working. But XDP512 template is wrong. XDP512 expanded addresses should be either a) 0x380000.0x3FFFFF or b) 0x780000.0x7FFFFF. a) are linear addresses (ppage*0x4000 + offset), b) are global addresses (ppage*0x4000 + offset)+0x400000. And XDP512 template in IDE uses expanded addresses taken from non X 9S12DP512 0x80000.0xFFFFF Edward > probably "v703" in the url, not "v603" > > http://www.imagecraft.com/pub/iccv712_v703_beta0.exe > > > Edward > > ----- Original Message ----- > From: "Richard" > To: > Sent: Monday, March 19, 2007 12:04 PM > Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 > > >> http://www.imagecraft.com/pub/iccv712_v603_beta0.exe >> >> Readme excerpt: >> V7.03 >> IDE >> - Added S12XDP512 to device list >> - Added a "CPU Type" radio group for "Custom" device. >> - Revamped how the expanded memory is used. Expanded memory is always >> enabled for HCS12 and S12X devices. >> - expanded memory uses either "-maps1" or "-maps12x" in linker flags, >> depending on the CPU type. >> - Added edit box to enter "INITRM" value for SRAM relocation. This >> will also link in the crt12initrm.o startup file instead of the >> default crt12.o >> Assembler >> - XGate support broke some processing in the CPU12 instruction >> processing. >> Fixed. >> Linker >> - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF >> window >> - Added -maps12x, maps 0x4000.0x7FFF as last_page in the >> 0x4000.0x7FFF window. >> >> >> // richard >> On-line orders, support, >> and listservers available on web site. >> [ For technical support on ImageCraft products, please include all >> previous replies in your msgs. ] >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot >> > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot From willard.a.hall at gm.com Tue Mar 20 03:54:09 2007 From: willard.a.hall at gm.com (willard.a.hall@gm.com) Date: Tue Mar 20 04:02:56 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 In-Reply-To: <000a01c76abf$3e2fb440$0400a8c0@edvardo> Message-ID: I just got mine working by using: \Proj\Opt\Targ\DeviceConfig\Custom\ Memory Addresses Program Memory 0x4000.0x7FFF:0xC000.0xFFFF Data Memory 0x1000 Stack Pointer 0x4000 Expanded Memory Enable, Addr 0x380000.0x3F3FFF Make Paged Functions Default S2 Record Type CPU / Banked Address Bill Hall "Edward Karpicz" Sent by: icc-mot-bounces@imagecraft.com 03/20/2007 03:13 AM Please respond to "Discussion List for ICC08/11/12/16 users. You do NOT need to subscribe to icc-announce if you are a member of this." To "Discussion List for ICC08/11/12/16 users. You do NOT need tosubscribe toicc-announce if you are a member of this." cc Subject Re: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 Trying again Some issues with this beta: 1) When INITRM editbox isn't blank I'm getting this !ERROR Cannot open file 'crt12initrm.o' in library path(s) Ok, this can be easily fixed by picking crtinitrm.s from libsrc.zip and compiling it to *.o file in \lib folder. 2) Something's wrong with 4000-7fff remapping for S12 derivatives. I have code consisting just of void main(void){}. It compiles ant links to S20F0E8000CF200016402B87CE04008E0B S2110E800B040027056A000820F6CE4030CD92 S2120E801804008E40302706180A307020F5162B S2080E8026402A20FEBB S2050E802A3D05 S2090E802B1D0016073DC6 No matter is it Custom HCS12, D64 or D128, s19 is always the same. 0x4000 addresses are being translated to 0xE8000 (ppage=$3a). They should be moved to 0xF8000 (ppage=$3e). 3) HCS12X translation of $4000 to lastpage-2 seems being working. But XDP512 template is wrong. XDP512 expanded addresses should be either a) 0x380000.0x3FFFFF or b) 0x780000.0x7FFFFF. a) are linear addresses (ppage*0x4000 + offset), b) are global addresses (ppage*0x4000 + offset)+0x400000. And XDP512 template in IDE uses expanded addresses taken from non X 9S12DP512 0x80000.0xFFFFF Edward > probably "v703" in the url, not "v603" > > http://www.imagecraft.com/pub/iccv712_v703_beta0.exe > > > Edward > > ----- Original Message ----- > From: "Richard" > To: > Sent: Monday, March 19, 2007 12:04 PM > Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 > > >> http://www.imagecraft.com/pub/iccv712_v603_beta0.exe >> >> Readme excerpt: >> V7.03 >> IDE >> - Added S12XDP512 to device list >> - Added a "CPU Type" radio group for "Custom" device. >> - Revamped how the expanded memory is used. Expanded memory is always >> enabled for HCS12 and S12X devices. >> - expanded memory uses either "-maps1" or "-maps12x" in linker flags, >> depending on the CPU type. >> - Added edit box to enter "INITRM" value for SRAM relocation. This >> will also link in the crt12initrm.o startup file instead of the >> default crt12.o >> Assembler >> - XGate support broke some processing in the CPU12 instruction >> processing. >> Fixed. >> Linker >> - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF >> window >> - Added -maps12x, maps 0x4000.0x7FFF as last_page in the >> 0x4000.0x7FFF window. >> >> >> // richard >> On-line orders, support, >> and listservers available on web site. >> [ For technical support on ImageCraft products, please include all >> previous replies in your msgs. ] >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot >> > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot _______________________________________________ Icc-mot mailing list Icc-mot@imagecraft.com http://dragonsgate.net/mailman/listinfo/icc-mot -------------- next part -------------- An HTML attachment was scrubbed... URL: http://dragonsgate.net/pipermail/icc-mot/attachments/20070320/6207d1c8/attachment.html From ekarpicz at freemail.lt Tue Mar 20 05:36:32 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Tue Mar 20 06:11:11 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 References: Message-ID: <001201c76af4$c7a1e970$0400a8c0@edvardo> Your settings are good for S12X. And I said that S12X 4000..7FFF translation to page 0xFD works as expected. The only S12X issue I see for now is that template settings for XDP512 are bit odd. In contrast, with S12 (non X), it got quite hard to build working S records. Didn't have time to try if C000..FFFF translation to page 3F works. But 4000.7FFF to 3E doesn't work, new linker translates it to 3A. Quite showstopper if you are using S12. Edward ----- Original Message ----- From: willard.a.hall@gm.com To: Discussion List for ICC08/11/12/16 users. You do NOT need to subscribe toicc-announce if you are a member of this. Sent: Tuesday, March 20, 2007 1:54 PM Subject: Re: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 I just got mine working by using: \Proj\Opt\Targ\DeviceConfig\Custom\ Memory Addresses Program Memory 0x4000.0x7FFF:0xC000.0xFFFF Data Memory 0x1000 Stack Pointer 0x4000 Expanded Memory Enable, Addr 0x380000.0x3F3FFF Make Paged Functions Default S2 Record Type CPU / Banked Address Bill Hall "Edward Karpicz" Sent by: icc-mot-bounces@imagecraft.com 03/20/2007 03:13 AM Please respond to "Discussion List for ICC08/11/12/16 users. You do NOT need to subscribe to icc-announce if you are a member of this." To "Discussion List for ICC08/11/12/16 users. You do NOT need tosubscribe toicc-announce if you are a member of this." cc Subject Re: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 Trying again Some issues with this beta: 1) When INITRM editbox isn't blank I'm getting this !ERROR Cannot open file 'crt12initrm.o' in library path(s) Ok, this can be easily fixed by picking crtinitrm.s from libsrc.zip and compiling it to *.o file in \lib folder. 2) Something's wrong with 4000-7fff remapping for S12 derivatives. I have code consisting just of void main(void){}. It compiles ant links to S20F0E8000CF200016402B87CE04008E0B S2110E800B040027056A000820F6CE4030CD92 S2120E801804008E40302706180A307020F5162B S2080E8026402A20FEBB S2050E802A3D05 S2090E802B1D0016073DC6 No matter is it Custom HCS12, D64 or D128, s19 is always the same. 0x4000 addresses are being translated to 0xE8000 (ppage=$3a). They should be moved to 0xF8000 (ppage=$3e). 3) HCS12X translation of $4000 to lastpage-2 seems being working. But XDP512 template is wrong. XDP512 expanded addresses should be either a) 0x380000.0x3FFFFF or b) 0x780000.0x7FFFFF. a) are linear addresses (ppage*0x4000 + offset), b) are global addresses (ppage*0x4000 + offset)+0x400000. And XDP512 template in IDE uses expanded addresses taken from non X 9S12DP512 0x80000.0xFFFFF Edward > probably "v703" in the url, not "v603" > > http://www.imagecraft.com/pub/iccv712_v703_beta0.exe > > > Edward > > ----- Original Message ----- > From: "Richard" > To: > Sent: Monday, March 19, 2007 12:04 PM > Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 > > >> http://www.imagecraft.com/pub/iccv712_v603_beta0.exe >> >> Readme excerpt: >> V7.03 >> IDE >> - Added S12XDP512 to device list >> - Added a "CPU Type" radio group for "Custom" device. >> - Revamped how the expanded memory is used. Expanded memory is always >> enabled for HCS12 and S12X devices. >> - expanded memory uses either "-maps1" or "-maps12x" in linker flags, >> depending on the CPU type. >> - Added edit box to enter "INITRM" value for SRAM relocation. This >> will also link in the crt12initrm.o startup file instead of the >> default crt12.o >> Assembler >> - XGate support broke some processing in the CPU12 instruction >> processing. >> Fixed. >> Linker >> - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF >> window >> - Added -maps12x, maps 0x4000.0x7FFF as last_page in the >> 0x4000.0x7FFF window. >> >> >> // richard >> On-line orders, support, >> and listservers available on web site. >> [ For technical support on ImageCraft products, please include all >> previous replies in your msgs. ] >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot >> > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot _______________________________________________ Icc-mot mailing list Icc-mot@imagecraft.com http://dragonsgate.net/mailman/listinfo/icc-mot ------------------------------------------------------------------------------ _______________________________________________ Icc-mot mailing list Icc-mot@imagecraft.com http://dragonsgate.net/mailman/listinfo/icc-mot -------------- next part -------------- An HTML attachment was scrubbed... URL: http://dragonsgate.net/pipermail/icc-mot/attachments/20070320/03173884/attachment.html From richard-lists at imagecraft.com Tue Mar 20 13:17:40 2007 From: richard-lists at imagecraft.com (Richard) Date: Tue Mar 20 12:26:03 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 In-Reply-To: <001201c76af4$c7a1e970$0400a8c0@edvardo> References: <001201c76af4$c7a1e970$0400a8c0@edvardo> Message-ID: <6.1.0.6.2.20070320131619.0af36830@192.168.100.42> Edward, CPU12 paging scheme will drive me mad one of these days :-) I will fix the XDP512 template. For the S12 non-X, 0x4000 problem, are you using SrecCVT or not? At 05:36 AM 3/20/2007, Edward Karpicz wrote: >Your settings are good for S12X. And I said that S12X 4000..7FFF >translation to page 0xFD works as expected. The only S12X issue I see for >now is that template settings for XDP512 are bit odd. > >In contrast, with S12 (non X), it got quite hard to build working S >records. Didn't have time to try if C000..FFFF translation to page 3F >works. But 4000.7FFF to 3E doesn't work, new linker translates it to 3A. >Quite showstopper if you are using S12. > >Edward // richard (This email is for mailing lists. To reach me directly, please use richard at imagecraft.com) From ekarpicz at freemail.lt Tue Mar 20 13:28:22 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Tue Mar 20 13:36:43 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 References: <001201c76af4$c7a1e970$0400a8c0@edvardo> <6.1.0.6.2.20070320131619.0af36830@192.168.100.42> Message-ID: <040501c76b36$afc04d50$a300a8c0@REKS> Hi Regarding S12. No, I'm not using SrecCVT over 7.03beta, yet. I just tried to evaluate these new features, INITRM and HC12/HCS12/HCS12X radio box. HCS12 is what doesn't work properly. BTW 0xC000 seems to be being S1->S2 translated well. Having HCS12 selected and 0x80000.0xFFFFF specified in expanded memory edit box, and compiling this #pragma abs_address:0x4ABC void main(void) { } #pragma abs_address:0xCABC void foo(void) { } I'm getting this: S2050E8ABC3D69 <- this is main S2050FCABC3D28 <- this is foo foo is OK, main isn't. S1 0x4000.0x7FFF should be linear S2 0x0F8000..0x0FBFFF (or banked S2 0x3E8000..0x3EBFFF). And if you look at S-record of main then you will notice that S1 0x4ABC is S2 0x0E8ABC instead of proper 0x0F8ABC. Regards Edward ----- Original Message ----- From: "Richard" To: "Discussion List for ICC08/11/12/16 users. You do NOT need to subscribe toicc-announce if you are a member of this." ; "Discussion List for ICC08/11/12/16 users. You do NOT need tosubscribetoicc-announce if you are a member of this." Sent: Tuesday, March 20, 2007 23:17 Subject: Re: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 > Edward, CPU12 paging scheme will drive me mad one of these days :-) > > I will fix the XDP512 template. For the S12 non-X, 0x4000 problem, are you > using SrecCVT or not? > > At 05:36 AM 3/20/2007, Edward Karpicz wrote: >>Your settings are good for S12X. And I said that S12X 4000..7FFF >>translation to page 0xFD works as expected. The only S12X issue I see for >>now is that template settings for XDP512 are bit odd. >> >>In contrast, with S12 (non X), it got quite hard to build working S >>records. Didn't have time to try if C000..FFFF translation to page 3F >>works. But 4000.7FFF to 3E doesn't work, new linker translates it to 3A. >>Quite showstopper if you are using S12. >> >>Edward > > // richard (This email is for mailing lists. To reach me directly, please > use richard at imagecraft.com) > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > From richard-lists at imagecraft.com Tue Mar 20 15:07:29 2007 From: richard-lists at imagecraft.com (Richard) Date: Tue Mar 20 14:15:51 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 In-Reply-To: <040501c76b36$afc04d50$a300a8c0@REKS> References: <001201c76af4$c7a1e970$0400a8c0@edvardo> <6.1.0.6.2.20070320131619.0af36830@192.168.100.42> <040501c76b36$afc04d50$a300a8c0@REKS> Message-ID: <6.1.0.6.2.20070320150638.0af68630@192.168.100.42> Ah, I think I know the problem. I misunderstood what Motorola/Freescale meant when they say under the S12 that 0x4000 is the last_page-1. I will fix! Thanks. At 01:28 PM 3/20/2007, Edward Karpicz wrote: >Hi > >Regarding S12. No, I'm not using SrecCVT over 7.03beta, yet. I just tried >to evaluate these new features, INITRM and HC12/HCS12/HCS12X radio box. >HCS12 is what doesn't work properly. BTW 0xC000 seems to be being S1->S2 >translated well. Having HCS12 selected and 0x80000.0xFFFFF specified in >expanded memory edit box, and compiling this > >#pragma abs_address:0x4ABC >void main(void) >{ >} > > >#pragma abs_address:0xCABC >void foo(void) >{ >} > > >I'm getting this: > >S2050E8ABC3D69 <- this is main >S2050FCABC3D28 <- this is foo > >foo is OK, main isn't. S1 0x4000.0x7FFF should be linear S2 >0x0F8000..0x0FBFFF (or banked S2 0x3E8000..0x3EBFFF). And if you look at >S-record of main then you will notice that S1 0x4ABC is S2 0x0E8ABC >instead of proper 0x0F8ABC. > > >Regards >Edward > > // richard (This email is for mailing lists. To reach me directly, please use richard at imagecraft.com) From richard at imagecraft.com Wed Mar 21 01:31:07 2007 From: richard at imagecraft.com (Richard) Date: Wed Mar 21 00:39:30 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 1 Message-ID: <6.1.0.6.2.20070321012935.0af8d808@192.168.100.42> The reported problems with the XDP512 expanded range, the 0x4000.0x7FFF in the S12 S2 records, and the missing crt12initrm.o have been fixed: http://www.imagecraft.com/pub/iccv712_v703_beta1.exe Readme excerpt: V7.03 IDE - Added S12XDP512 to device list - Added a "CPU Type" radio group for "Custom" device. - Revamped how the expanded memory is used. Expanded memory is always enabled for HCS12 and S12X devices. - expanded memory uses either "-maps1" or "-maps12x" in linker flags, depending on the CPU type. - Added edit box to enter "INITRM" value for SRAM relocation. This will also link in the crt12initrm.o startup file instead of the default crt12.o Assembler - XGate support broke some processing in the CPU12 instruction processing. Fixed. Linker - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF window - Added -maps12x, maps 0x4000.0x7FFF as last_page in the 0x4000.0x7FFF window. // richard On-line orders, support, and listservers available on web site. [ For technical support on ImageCraft products, please include all previous replies in your msgs. ] From ekarpicz at freemail.lt Wed Mar 21 02:04:36 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Wed Mar 21 03:06:21 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 References: <001201c76af4$c7a1e970$0400a8c0@edvardo><6.1.0.6.2.20070320131619.0af36830@192.168.100.42><040501c76b36$afc04d50$a300a8c0@REKS> <6.1.0.6.2.20070320150638.0af68630@192.168.100.42> Message-ID: <000c01c76ba0$54f54cd0$0400a8c0@edvardo> Richard wrote: > Ah, I think I know the problem. I misunderstood what Motorola/Freescale > meant when they say under the S12 that 0x4000 is the last_page-1. I will > fix! OK, thanks. One more issue. You made this map S1 to S2 always on and not controllable for S12/S12X targets, even for custom S12/S12X target. And linker is aggressive and complains when it sees something in nonpaged 8000-BFFF: 1) target: Custom 2) CPU=HCS12 3) Program memory: 0x8000 C:\iccv712\bin\imakew -f INITRM.mak icc12w -o INITRM -btext:0x8000.0xFFFF -bdata:0x0400 -bextcode:0xF0000.0xFFFFF -maps1 -dinit_sp:0x1000 -fmots19 @INITRM.lk -lc12p !E C:\iccv712\lib\crt12.o(22): Cannot map address 0x409db3 into S2 record range. Address must be between 0x4000 to 0x7FFF or between 0xC000 to 0xFFFF !E C:\iccv712\lib\crt12.o(24): Cannot map address 0x409db3 into S2 record range. Address must be between 0x4000 to 0x7FFF or between 0xC000 to 0xFFFF !E C:\iccv712\lib\crt12.o(26): Cannot map address 0x409db3 into S2 record range. Address must be between 0x4000 to 0x7FFF or between 0xC000 to 0xFFFF C:\iccv712\bin\imakew.exe: Error code 4 Done: there are error(s). Exit code: 4. Wed Mar 21 09:31:55 2007 Nonpaged 4000..ffff was always the best setup for <=48k applications. Either linker shouldn't complain about 8000.bfff or that -maps1 switch should be controllable. BTW are you going to remap somehow in future C32 S1 records 8000.ffff to S2? C32 target doesn't complain about addresses 8000.bfff And yet another 2c regarding INITRM. Try to choose any target, let it be Dx128. Data memory edit box is disabled. Now write something to INITRM. Data memory settings are still disabled but RAM moved! This is bit odd. Also note that S12X don't have INITRM. Something should be done to improve the situation, what about: - enabling INITRM only for custom target. User will know where remapped ram will appear - enabling datamem and stack editboxes when INITRM edit isn't empty - calculating datamem settings from target type and INITRM settings :-). I guess this is not what you would like to do. But this would be very nice. I downloaded beta1. Looks like CPU type isn't saved or sometimes doesn't get saved in project options. Could you please check this? Regards Edward > > Thanks. > > At 01:28 PM 3/20/2007, Edward Karpicz wrote: >>Hi >> >>Regarding S12. No, I'm not using SrecCVT over 7.03beta, yet. I just tried >>to evaluate these new features, INITRM and HC12/HCS12/HCS12X radio box. >>HCS12 is what doesn't work properly. BTW 0xC000 seems to be being S1->S2 >>translated well. Having HCS12 selected and 0x80000.0xFFFFF specified in >>expanded memory edit box, and compiling this >> >>#pragma abs_address:0x4ABC >>void main(void) >>{ >>} >> >> >>#pragma abs_address:0xCABC >>void foo(void) >>{ >>} >> >> >>I'm getting this: >> >>S2050E8ABC3D69 <- this is main >>S2050FCABC3D28 <- this is foo >> >>foo is OK, main isn't. S1 0x4000.0x7FFF should be linear S2 >>0x0F8000..0x0FBFFF (or banked S2 0x3E8000..0x3EBFFF). And if you look at >>S-record of main then you will notice that S1 0x4ABC is S2 0x0E8ABC >>instead of proper 0x0F8ABC. >> >> >>Regards >>Edward >> >> > > // richard (This email is for mailing lists. To reach me directly, please > use richard at imagecraft.com) > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot From ekarpicz at freemail.lt Wed Mar 21 00:03:44 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Wed Mar 21 06:20:46 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 0 References: <001201c76af4$c7a1e970$0400a8c0@edvardo><6.1.0.6.2.20070320131619.0af36830@192.168.100.42><040501c76b36$afc04d50$a300a8c0@REKS> <6.1.0.6.2.20070320150638.0af68630@192.168.100.42> Message-ID: <007201c76b8f$733643e0$0400a8c0@edvardo> OK, thanks. One more issue. You made this map S1 to S2 always on and not controllable for S12/S12X targets, even for custom S12/S12X target. And linker is aggressive and complains when it sees something in nonpaged 8000-BFFF: 1) target: Custom 2) CPU=HCS12 3) Program memory: 0x8000 C:\iccv712\bin\imakew -f INITRM.mak icc12w -o INITRM -btext:0x8000.0xFFFF -bdata:0x0400 -bextcode:0xF0000.0xFFFFF -maps1 -dinit_sp:0x1000 -fmots19 @INITRM.lk -lc12p !E C:\iccv712\lib\crt12.o(22): Cannot map address 0x409db3 into S2 record range. Address must be between 0x4000 to 0x7FFF or between 0xC000 to 0xFFFF !E C:\iccv712\lib\crt12.o(24): Cannot map address 0x409db3 into S2 record range. Address must be between 0x4000 to 0x7FFF or between 0xC000 to 0xFFFF !E C:\iccv712\lib\crt12.o(26): Cannot map address 0x409db3 into S2 record range. Address must be between 0x4000 to 0x7FFF or between 0xC000 to 0xFFFF C:\iccv712\bin\imakew.exe: Error code 4 Done: there are error(s). Exit code: 4. Wed Mar 21 09:31:55 2007 Nonpaged 4000..ffff was always the best setup for <=48k applications. Either linker shouldn't complain about 8000.bfff or that -maps1 switch should be controllable. BTW are you going to remap somehow in future C32 S1 records 8000.ffff to S2? C32 target doesn't complain about addresses 8000.bfff And yet another 2c regarding INITRM. Try to choose any target, let it be Dx128. Data memory edit box is disabled. Write something to INITRM; data memory settings are still disabled! This is bit odd. Also S12X don't have INITRM. Something should be done here, what about: - enabling INITRM only in custom target. User will know where remapped ram will appear - enabling datamem and stack editboxes when INITRM edit isn't empty - calculating datamem settings from target type and INITRM settings :-) Regards Edward Richard wrote: > Ah, I think I know the problem. I misunderstood what Motorola/Freescale > meant when they say under the S12 that 0x4000 is the last_page-1. I will > fix! > > Thanks. > > At 01:28 PM 3/20/2007, Edward Karpicz wrote: >>Hi >> >>Regarding S12. No, I'm not using SrecCVT over 7.03beta, yet. I just tried >>to evaluate these new features, INITRM and HC12/HCS12/HCS12X radio box. >>HCS12 is what doesn't work properly. BTW 0xC000 seems to be being S1->S2 >>translated well. Having HCS12 selected and 0x80000.0xFFFFF specified in >>expanded memory edit box, and compiling this >> >>#pragma abs_address:0x4ABC >>void main(void) >>{ >>} >> >> >>#pragma abs_address:0xCABC >>void foo(void) >>{ >>} >> >> >>I'm getting this: >> >>S2050E8ABC3D69 <- this is main >>S2050FCABC3D28 <- this is foo >> >>foo is OK, main isn't. S1 0x4000.0x7FFF should be linear S2 >>0x0F8000..0x0FBFFF (or banked S2 0x3E8000..0x3EBFFF). And if you look at >>S-record of main then you will notice that S1 0x4ABC is S2 0x0E8ABC >>instead of proper 0x0F8ABC. >> >> >>Regards >>Edward >> >> > > // richard (This email is for mailing lists. To reach me directly, please > use richard at imagecraft.com) > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot From willard.a.hall at gm.com Wed Mar 21 10:16:08 2007 From: willard.a.hall at gm.com (willard.a.hall@gm.com) Date: Wed Mar 21 10:24:50 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 1 In-Reply-To: <6.1.0.6.2.20070321012935.0af8d808@192.168.100.42> Message-ID: Hi Richard; I just got V7.03 beta1 working with my c32 and xdp512. Everything worked except the DataMemory for the xdp512 had to be changed from 0x0800 to 0x1000. I used Log2Phy for the xdp512, then NoICE could use the *.phy after I downloaded their patch. Hopefully your next version will include the logical to physical conversion. Bill Hall Richard Sent by: icc-mot-bounces@imagecraft.com 03/21/2007 05:31 AM Please respond to "Discussion List for ICC08/11/12/16 users. You do NOT need to subscribe to icc-announce if you are a member of this." To icc-mot@imagecraft.com cc Subject [Icc-mot] ICCV7 for CPU12 V7.03 Beta 1 The reported problems with the XDP512 expanded range, the 0x4000.0x7FFF in the S12 S2 records, and the missing crt12initrm.o have been fixed: http://www.imagecraft.com/pub/iccv712_v703_beta1.exe Readme excerpt: V7.03 IDE - Added S12XDP512 to device list - Added a "CPU Type" radio group for "Custom" device. - Revamped how the expanded memory is used. Expanded memory is always enabled for HCS12 and S12X devices. - expanded memory uses either "-maps1" or "-maps12x" in linker flags, depending on the CPU type. - Added edit box to enter "INITRM" value for SRAM relocation. This will also link in the crt12initrm.o startup file instead of the default crt12.o Assembler - XGate support broke some processing in the CPU12 instruction processing. Fixed. Linker - -maps1 now maps 0x4000.0x7FFF as last_page-1 in the 0x8000.0xBFFF window - Added -maps12x, maps 0x4000.0x7FFF as last_page in the 0x4000.0x7FFF window. // richard On-line orders, support, and listservers available on web site. [ For technical support on ImageCraft products, please include all previous replies in your msgs. ] _______________________________________________ Icc-mot mailing list Icc-mot@imagecraft.com http://dragonsgate.net/mailman/listinfo/icc-mot -------------- next part -------------- An HTML attachment was scrubbed... URL: http://dragonsgate.net/pipermail/icc-mot/attachments/20070321/b00b5e4f/attachment.html From richard at imagecraft.com Thu Mar 22 01:57:24 2007 From: richard at imagecraft.com (Richard) Date: Thu Mar 22 01:05:51 2007 Subject: [Icc-mot] ICCV7 for CPU12 V7.03 Beta 2 Message-ID: <6.1.0.6.2.20070322015342.0af980c0@192.168.100.42> By popular demand, I have again make the "Expanded Memory" Enable box optional, and remove the INITRM checkbox. The "note" on the bottom and the Help file have been augmented to mention the INITRM usage: http://www.imagecraft.com/pub/iccv712_v703_beta2.exe Readme excerpt: V7.03 IDE - Added S12XDP512 to device list - Added a "CPU Type" radio group for "Custom" device. - expanded memory uses either "-maps1" or "-maps12x" in linker flags, depending on the CPU type. - Changed names from HC... to MC... Assembler - XGate support broke some processing in the CPU12 instruction processing. Fixed. Linker - -maps1 now maps 0x4000.0x7FFF as last_page-1 - Added -maps12x, maps 0x4000.0x7FFF as last_page-2 // richard On-line orders, support, and listservers available on web site. [ For technical support on ImageCraft products, please include all previous replies in your msgs. ] From genenorris at spotengineering.com Mon Mar 26 09:39:58 2007 From: genenorris at spotengineering.com (Gene Norris) Date: Mon Mar 26 09:51:39 2007 Subject: [Icc-mot] Inline asm quirks Message-ID: <4608056E.4050201@spotengineering.com> Richard, Using v7.02... Local data used in inline assembly goes wrong when address calculation is required. The simplest example follows: ; asm(" adcb %data[3]"); adcb 26,S[3] Any pointer variable generates similar output, where the value is added to the stack pointer reference rather than the offset. ; asm(" adcb %data_ptr->uc[1]"); adcb 9,S->uc[1] -- Gene Norris Chief Engineer SPOT Engineering, Inc. 1261 Campground Road Lancaster, Ohio 43130 740.654.0880 FAX.654.0889 http://www.spotengineering.com/ From richard at imagecraft.com Mon Mar 26 18:21:46 2007 From: richard at imagecraft.com (Richard) Date: Mon Mar 26 17:30:32 2007 Subject: [Icc-mot] ICCV7 for CPU12 7.03 released Message-ID: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> V7.03 - March 26th 2007 [ Vista compatible licensing engine ] IDE - Added S12XDP512 to device list - Added a "CPU Type" radio group for "Custom" device. - expanded memory uses either "-maps1" or "-maps12x" in linker flags, depending on the CPU type. - Changed device names from HC... to MC... Preprocessor - __FILE__ now expands to filename without the path component Assembler - XGate support broke some processing in the CPU12 instruction processing. Fixed. Linker - -maps1 now maps 0x4000.0x7FFF as last_page-1 - Added -maps12x, maps 0x4000.0x7FFF as last_page-2 // richard On-line orders, support, and listservers available on web site. [ For technical support on ImageCraft products, please include all previous replies in your msgs. ] From genenorris at spotengineering.com Tue Mar 27 06:44:33 2007 From: genenorris at spotengineering.com (Gene Norris) Date: Tue Mar 27 07:18:49 2007 Subject: [Icc-mot] ICCV7 for CPU12 7.03 released In-Reply-To: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> References: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> Message-ID: <46092DD1.8080300@spotengineering.com> Thanks for the ftoa fix! Headers have changed, but now some have 8-bit pwm and some 16-bit. Both should be available in each header file. dp512.h #define PWMCNT01 (*(volatile unsigned *)(REG_BASE + 0x000000AC)) #define PWMCNT23 (*(volatile unsigned *)(REG_BASE + 0x000000AE)) #define PWMCNT45 (*(volatile unsigned *)(REG_BASE + 0x000000B0)) #define PWMCNT67 (*(volatile unsigned *)(REG_BASE + 0x000000B2)) #define PWMPER01 (*(volatile unsigned *)(REG_BASE + 0x000000B4)) #define PWMPER23 (*(volatile unsigned *)(REG_BASE + 0x000000B6)) #define PWMPER45 (*(volatile unsigned *)(REG_BASE + 0x000000B8)) #define PWMPER67 (*(volatile unsigned *)(REG_BASE + 0x000000BA)) #define PWMDTY01 (*(volatile unsigned *)(REG_BASE + 0x000000BC)) #define PWMDTY23 (*(volatile unsigned *)(REG_BASE + 0x000000BE)) #define PWMDTY45 (*(volatile unsigned *)(REG_BASE + 0x000000C0)) #define PWMDTY67 (*(volatile unsigned *)(REG_BASE + 0x000000C2)) dp256.h #define PWMCNT0 _P(0xAC) #define PWMCNT1 _P(0xAD) #define PWMCNT2 _P(0xAE) #define PWMCNT3 _P(0xAF) #define PWMCNT4 _P(0xB0) #define PWMCNT5 _P(0xB1) #define PWMCNT6 _P(0xB2) #define PWMCNT7 _P(0xB3) Richard wrote: > V7.03 - March 26th 2007 > [ Vista compatible licensing engine ] > IDE > - Added S12XDP512 to device list > - Added a "CPU Type" radio group for "Custom" device. > - expanded memory uses either "-maps1" or "-maps12x" in linker flags, > depending on the CPU type. > - Changed device names from HC... to MC... > Preprocessor > - __FILE__ now expands to filename without the path component > Assembler > - XGate support broke some processing in the CPU12 instruction > processing. > Fixed. > Linker > - -maps1 now maps 0x4000.0x7FFF as last_page-1 > - Added -maps12x, maps 0x4000.0x7FFF as last_page-2 > > > // richard > On-line orders, support, > and listservers available on web site. > [ For technical support on ImageCraft products, please include all > previous replies in your msgs. ] > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > > -- Gene Norris Chief Engineer SPOT Engineering, Inc. 1261 Campground Road Lancaster, Ohio 43130 740.654.0880 FAX.654.0889 http://www.spotengineering.com/ From jpdi at free.fr Wed Mar 28 02:25:13 2007 From: jpdi at free.fr (jpdi@free.fr) Date: Wed Mar 28 01:32:52 2007 Subject: [Icc-mot] ICCV7 for CPU12, some questions In-Reply-To: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> References: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> Message-ID: <000901c77123$601e6ff0$06aa4052@winxp> Dear Sir, I just begin to pass from 9s12dp256 to 9s12Xdp512, so I downloaded the beta 03 version of ICC712, and I've some questions about it : - Using professional version 6, and waiting for the full professional version, including XGATE functionality, do the version 6 compile code for HC12X, and manage paged functions ? What kind of processor I've to use with Version 6 for compile for a 9s12xdp512 processor ? - With 9s12dp256, I usually developed some functions in RAM area, in order to avoid to burn too much the flash eeprom. To do that, I used "custom device", program memory 0xd000, Stack 0xff80, and with NoIce, I used a command file "edit 0x10 0xd1" to put ram area in 0xd000. It seems that register, "INITRM" disappeared ? Is it possible to do the same kind of thing with Xdp512 ? I know it's a question about XGATE family, not about the compiler. - Examining the .SRC files, I sow the EDI automatically verify SRC file and changes absolute path to Files in relative path. It refuses any modification I try to write with an alternative editor, obliging me to close the project, and open again... In fact, I preferred the precedent way, absolute path, which was easier for creating and analysing project, as a SRC file of mine shown below : [Files] main.c vectors.c Rti.c LcdGraph.c c:\Disque_D\9s12\Icc12\Library\KeyGraph.c c:\Disque_D\9s12\Icc12\Library\Delay.c c:\Disque_D\9s12\Icc12\Library\Dble.c c:\Disque_D\9s12\Icc12\Library\Bus_arriere.c c:\Disque_D\9s12\Icc12\Library\Sci1_duplex.c c:\Disque_D\9s12\Icc12\Library\JOEL_MemClear.c c:\Disque_D\9s12\Icc12\Library\JOEL_Mem255.c [Headers] c:\Disque_D\9s12\Icc12\Library\Delay.h c:\Disque_D\9s12\Icc12\Library\MesMacros.h [Documents] _lire.txt TestCle.noi TestCle.src that means that, for me "c:\Disque_D\9s12\Icc12\Library\Bus_arriere.c" is more easy to read than "..\..\..\..\..\Icc12\Library\Bus_arriere.c" and it's easier for copying different projects with some differences from a directory to another one. But maybe your have an excellent reason for that ! - It seems you changed the way to pass parameters to a function (compare with version 6), because functions I developed in assembly language doesn't run now. See below a quick function to reset memory area I used before. // OK under version 6, KO with version 7 void JOEL_MemClear (void *ptr, unsigned int nb_octets) { if (nb_octets == 0) return; asm ( "pshx \n" // sauve X "pshy \n" // sauve Y "ldy %ptr \n" // Y pointe sur destination "ldx %nb_octets \n" // X contient nbre octets "clra \n" // A <- 0 "MemClear: \n" "staa 0,y \n" // *Y <-- A "iny \n" "dbne x,MemClear \n" // fini ? sort "puly \n" "pulx \n" ); } I've pleasure to work with you and your compiler ! Thank you for your answer. Best regards Joel Petrique ********************************************************************* Di?se-Info?/ Jo?l P?trique L'?lectronique et l'informatique au service de l'orgue ? tuyaux 10 rue Jules Ferry?- 01200 BELLEGARDE-SUR-VALSERINE?- France T?l-fax?: (+33) 04 50 56 74 03 Gsm?: 06 09 76 07 71 Web?: www.dieseinfo.com From ekarpicz at freemail.lt Wed Mar 28 03:24:49 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Wed Mar 28 03:33:31 2007 Subject: [Icc-mot] ICCV7 for CPU12, some questions References: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> <000901c77123$601e6ff0$06aa4052@winxp> Message-ID: <001101c7712b$b2aaf830$0400a8c0@edvardo> Yes, it's possible to use V6 and paged functions to compile HCS12X code. You should use custom target. XDx512 Expanded Memory settings should be set to 0x380000.0x3FFFFF. Right, HCS12X don't have INITRM, INITEE, INITRG registers. RAM can't be remapped from its default locations. Regarding your routine with inline asm. If you remove pulls and psh'es it will start to work again. Major step from V6 to V7 is that X register is no more freezed to play frame pointers role. Since SP relative addressing mode is available, it's the best to use SP as frame pointer and use X for temporaries, maths, etc. It means more freedom for new optimizations and for user since user doesn't have to preserve X any more. Since SP is frame pointer, all locals are relative to SP and you should be careful when pushing and pulling something to stack. Inline asms % operator doesn't track if you do adjustments to SP. Here's one ways to fix your code: "pshx \n" // sauve X "pshy \n" // sauve Y "ldy 4+%ptr \n" // Y pointe sur destination "ldx 4+%nb_octets \n" // X contient nbre octets 4+ is how much did SP change after pshx and pshy. Edward ----- Original Message ----- From: To: Sent: Wednesday, March 28, 2007 1:25 PM Subject: [Icc-mot] ICCV7 for CPU12, some questions Dear Sir, I just begin to pass from 9s12dp256 to 9s12Xdp512, so I downloaded the beta 03 version of ICC712, and I've some questions about it : - Using professional version 6, and waiting for the full professional version, including XGATE functionality, do the version 6 compile code for HC12X, and manage paged functions ? What kind of processor I've to use with Version 6 for compile for a 9s12xdp512 processor ? - With 9s12dp256, I usually developed some functions in RAM area, in order to avoid to burn too much the flash eeprom. To do that, I used "custom device", program memory 0xd000, Stack 0xff80, and with NoIce, I used a command file "edit 0x10 0xd1" to put ram area in 0xd000. It seems that register, "INITRM" disappeared ? Is it possible to do the same kind of thing with Xdp512 ? I know it's a question about XGATE family, not about the compiler. - Examining the .SRC files, I sow the EDI automatically verify SRC file and changes absolute path to Files in relative path. It refuses any modification I try to write with an alternative editor, obliging me to close the project, and open again... In fact, I preferred the precedent way, absolute path, which was easier for creating and analysing project, as a SRC file of mine shown below : [Files] main.c vectors.c Rti.c LcdGraph.c c:\Disque_D\9s12\Icc12\Library\KeyGraph.c c:\Disque_D\9s12\Icc12\Library\Delay.c c:\Disque_D\9s12\Icc12\Library\Dble.c c:\Disque_D\9s12\Icc12\Library\Bus_arriere.c c:\Disque_D\9s12\Icc12\Library\Sci1_duplex.c c:\Disque_D\9s12\Icc12\Library\JOEL_MemClear.c c:\Disque_D\9s12\Icc12\Library\JOEL_Mem255.c [Headers] c:\Disque_D\9s12\Icc12\Library\Delay.h c:\Disque_D\9s12\Icc12\Library\MesMacros.h [Documents] _lire.txt TestCle.noi TestCle.src that means that, for me "c:\Disque_D\9s12\Icc12\Library\Bus_arriere.c" is more easy to read than "..\..\..\..\..\Icc12\Library\Bus_arriere.c" and it's easier for copying different projects with some differences from a directory to another one. But maybe your have an excellent reason for that ! - It seems you changed the way to pass parameters to a function (compare with version 6), because functions I developed in assembly language doesn't run now. See below a quick function to reset memory area I used before. // OK under version 6, KO with version 7 void JOEL_MemClear (void *ptr, unsigned int nb_octets) { if (nb_octets == 0) return; asm ( "pshx \n" // sauve X "pshy \n" // sauve Y "ldy %ptr \n" // Y pointe sur destination "ldx %nb_octets \n" // X contient nbre octets "clra \n" // A <- 0 "MemClear: \n" "staa 0,y \n" // *Y <-- A "iny \n" "dbne x,MemClear \n" // fini ? sort "puly \n" "pulx \n" ); } I've pleasure to work with you and your compiler ! Thank you for your answer. Best regards Joel Petrique ********************************************************************* Di?se-Info / Jo?l P?trique L'?lectronique et l'informatique au service de l'orgue ? tuyaux 10 rue Jules Ferry - 01200 BELLEGARDE-SUR-VALSERINE - France T?l-fax : (+33) 04 50 56 74 03 Gsm : 06 09 76 07 71 Web : www.dieseinfo.com _______________________________________________ Icc-mot mailing list Icc-mot@imagecraft.com http://dragonsgate.net/mailman/listinfo/icc-mot From jpdi at free.fr Wed Mar 28 10:05:36 2007 From: jpdi at free.fr (jpdi@free.fr) Date: Wed Mar 28 09:13:09 2007 Subject: [Icc-mot] ICCV7 for CPU12, some questions In-Reply-To: <001101c7712b$b2aaf830$0400a8c0@edvardo> References: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42><000901c77123$601e6ff0$06aa4052@winxp> <001101c7712b$b2aaf830$0400a8c0@edvardo> Message-ID: <000601c77163$b0d4b720$06aa4052@winxp> Thanks, Edward, for a so quick response !!! I'll try to modify my assembly files tomorrow. Joel -----Message d'origine----- De?: icc-mot-bounces@imagecraft.com [mailto:icc-mot-bounces@imagecraft.com] De la part de Edward Karpicz Envoy??: mercredi 28 mars 2007 13:25 ??: Discussion List for ICC08/11/12/16 users. You do NOT need tosubscribetoicc-announce if you are a member of this. Objet?: Re: [Icc-mot] ICCV7 for CPU12, some questions Yes, it's possible to use V6 and paged functions to compile HCS12X code. You should use custom target. XDx512 Expanded Memory settings should be set to 0x380000.0x3FFFFF. Right, HCS12X don't have INITRM, INITEE, INITRG registers. RAM can't be remapped from its default locations. Regarding your routine with inline asm. If you remove pulls and psh'es it will start to work again. Major step from V6 to V7 is that X register is no more freezed to play frame pointers role. Since SP relative addressing mode is available, it's the best to use SP as frame pointer and use X for temporaries, maths, etc. It means more freedom for new optimizations and for user since user doesn't have to preserve X any more. Since SP is frame pointer, all locals are relative to SP and you should be careful when pushing and pulling something to stack. Inline asms % operator doesn't track if you do adjustments to SP. Here's one ways to fix your code: "pshx \n" // sauve X "pshy \n" // sauve Y "ldy 4+%ptr \n" // Y pointe sur destination "ldx 4+%nb_octets \n" // X contient nbre octets 4+ is how much did SP change after pshx and pshy. Edward From ekarpicz at freemail.lt Thu Mar 29 03:11:55 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Thu Mar 29 14:34:04 2007 Subject: [Icc-mot] Inline asm quirks References: <4608056E.4050201@spotengineering.com> Message-ID: <002b01c771f3$1045a5e0$0400a8c0@edvardo> > Using v7.02... > > Local data used in inline assembly goes wrong when address calculation is > required. The simplest example follows: > > ; asm(" adcb %data[3]"); > adcb 26,S[3] Not only with local data. I of course would prefer more intelligent % in inline asm, but inline ICC asm was always the same, it didn't handle anything else than just replacing %variable to variable label if global or N,s (or N,x in V6). However I wonder how could inline asm handle for example %var1[var2]? Should compiler add code to compute the address of var2-th element of var1? Bad idea because % used not in the first line of inline asm can break our inlined code. I'm talking about this: asm(" ..."); asm(" ..."); asm(" ..."); compiler putting here % support code can break our code. asm(" xx %yy"); In your example, if data is char[] then I would write it this way asm(" adcb 3+%data"); // this should work and compile to adcb 3+26,S > > Any pointer variable generates similar output, where the value is added to > the stack pointer reference rather than the offset. > > ; asm(" adcb %data_ptr->uc[1]"); > adcb 9,S->uc[1] > This your code can't fit single asm line. "adcb %data_ptr->uc[0]" could be something like "adcb [9,S]" but there's no single line solution for adcb %data_ptr->uc[1] Edward > > -- > Gene Norris > Chief Engineer > > SPOT Engineering, Inc. > 1261 Campground Road > Lancaster, Ohio 43130 > 740.654.0880 > FAX.654.0889 > > http://www.spotengineering.com/ > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot > From genenorris at spotengineering.com Fri Mar 30 05:43:53 2007 From: genenorris at spotengineering.com (Gene Norris) Date: Fri Mar 30 05:54:33 2007 Subject: [Icc-mot] Inline asm quirks In-Reply-To: <002b01c771f3$1045a5e0$0400a8c0@edvardo> References: <4608056E.4050201@spotengineering.com> <002b01c771f3$1045a5e0$0400a8c0@edvardo> Message-ID: <460D1419.4090106@spotengineering.com> Edward Karpicz wrote: >> Using v7.02... >> >> Local data used in inline assembly goes wrong when address calculation >> is required. The simplest example follows: >> >> ; asm(" adcb %data[3]"); >> adcb 26,S[3] > > Not only with local data. I of course would prefer more intelligent % in > inline asm, but inline ICC asm was always the same, it didn't handle > anything else than just replacing %variable to variable label if global or > N,s (or N,x in V6). > However I wonder how could inline asm handle for example %var1[var2]? > Should > compiler add code to compute the address of var2-th > element of var1? Bad idea because % used not in the first line of inline > asm > can break our inlined code. I'm talking about this: > > asm(" ..."); > asm(" ..."); > asm(" ..."); > compiler putting here % support code can break our code. > asm(" xx %yy"); > > True, however, my examples could be pre-calculated addresses or values. > > > In your example, if data is char[] then I would write it this way > > asm(" adcb 3+%data"); // this should work and compile to > > adcb 3+26,S > This is exactly what I have done and it works perfectly. I think we are not to far from adding three, as that is what must be done in generating the code from C. (And, it is easy for me to say, since I'm not doing the work.) > >> >> Any pointer variable generates similar output, where the value is >> added to the stack pointer reference rather than the offset. >> >> ; asm(" adcb %data_ptr->uc[1]"); >> adcb 9,S->uc[1] >> > > This your code can't fit single asm line. I believe you can. > > "adcb %data_ptr->uc[0]" could be something like "adcb [9,S]" here data_ptr is the base (23,S) and uc[0] is offsetting it by 0*(sizeof(uc)) or 0 -- adcb 0+23,S > > but there's no single line solution for > > adcb %data_ptr->uc[1] here data_ptr is the base (23,S) and uc[1] is offsetting it by 1*(sizeof(uc)) or 1 so the solution is adcb 1+23,S or even 1*1+23,S Gene From genenorris at spotengineering.com Fri Mar 30 07:18:07 2007 From: genenorris at spotengineering.com (Gene Norris) Date: Fri Mar 30 07:29:33 2007 Subject: [Icc-mot] Inline asm quirks In-Reply-To: <460D1419.4090106@spotengineering.com> References: <4608056E.4050201@spotengineering.com> <002b01c771f3$1045a5e0$0400a8c0@edvardo> <460D1419.4090106@spotengineering.com> Message-ID: <460D2A2F.9090605@spotengineering.com> I should correct myself... _Pointers/Addresses If I can get this from C code ; address = &data[1]; leay 13,S sty 6,S I would like to see this from assembly ; asm("leay %&data[1]"); leay 13,S _Structures/Unions (not pointers) Should work as I described before: ; c = data.c[0]; movb 6,S,5,S ; asm("ldab %data.c[0]"); ldab 6,S and ; c = data.c[4]; movb 10,S,5,S ; asm("ldab %data.c[4]"); ldab 10,S Edward is right: > Edward Karpicz wrote: >> This your code can't fit single asm line. >> >> "adcb %data_ptr->uc[0]" could be something like "adcb [9,S]" >> >> but there's no single line solution for >> >> adcb %data_ptr->uc[1] Pointers would be too difficult! for example %var1[var2] The programmer would have to take that in steps... -- Gene Norris Chief Engineer SPOT Engineering, Inc. 1261 Campground Road Lancaster, Ohio 43130 740.654.0880 FAX.654.0889 http://www.spotengineering.com/ From ekarpicz at freemail.lt Thu Mar 29 23:55:29 2007 From: ekarpicz at freemail.lt (Edward Karpicz) Date: Fri Mar 30 18:22:29 2007 Subject: [Icc-mot] ICCV7 for CPU12 7.03 released References: <6.1.0.6.2.20070326182059.0b750e28@192.168.100.42> <46092DD1.8080300@spotengineering.com> Message-ID: <009701c772a0$c940cef0$0400a8c0@edvardo> Also ATDCTL2, ATDCTL3, ATDCTL4, ATDCTL5 registers are missing. Concatenated 16bits ATDCTL23, ATDCTL45 are present but we need also 8bit registers which are mentionet in datasheets. Edward ----- Original Message ----- From: "Gene Norris" To: "Discussion List for ICC08/11/12/16 users. You do NOT need to subscribe toicc-announce if you are a member of this." Sent: Tuesday, March 27, 2007 5:44 PM Subject: Re: [Icc-mot] ICCV7 for CPU12 7.03 released > Thanks for the ftoa fix! > > Headers have changed, but now some have 8-bit pwm and some 16-bit. Both > should be available in each header file. > > > dp512.h > #define PWMCNT01 (*(volatile unsigned *)(REG_BASE + 0x000000AC)) > #define PWMCNT23 (*(volatile unsigned *)(REG_BASE + 0x000000AE)) > #define PWMCNT45 (*(volatile unsigned *)(REG_BASE + 0x000000B0)) > #define PWMCNT67 (*(volatile unsigned *)(REG_BASE + 0x000000B2)) > #define PWMPER01 (*(volatile unsigned *)(REG_BASE + 0x000000B4)) > #define PWMPER23 (*(volatile unsigned *)(REG_BASE + 0x000000B6)) > #define PWMPER45 (*(volatile unsigned *)(REG_BASE + 0x000000B8)) > #define PWMPER67 (*(volatile unsigned *)(REG_BASE + 0x000000BA)) > #define PWMDTY01 (*(volatile unsigned *)(REG_BASE + 0x000000BC)) > #define PWMDTY23 (*(volatile unsigned *)(REG_BASE + 0x000000BE)) > #define PWMDTY45 (*(volatile unsigned *)(REG_BASE + 0x000000C0)) > #define PWMDTY67 (*(volatile unsigned *)(REG_BASE + 0x000000C2)) > > dp256.h > #define PWMCNT0 _P(0xAC) > #define PWMCNT1 _P(0xAD) > #define PWMCNT2 _P(0xAE) > #define PWMCNT3 _P(0xAF) > #define PWMCNT4 _P(0xB0) > #define PWMCNT5 _P(0xB1) > #define PWMCNT6 _P(0xB2) > #define PWMCNT7 _P(0xB3) > > Richard wrote: >> V7.03 - March 26th 2007 >> [ Vista compatible licensing engine ] >> IDE >> - Added S12XDP512 to device list >> - Added a "CPU Type" radio group for "Custom" device. >> - expanded memory uses either "-maps1" or "-maps12x" in linker flags, >> depending on the CPU type. >> - Changed device names from HC... to MC... >> Preprocessor >> - __FILE__ now expands to filename without the path component >> Assembler >> - XGate support broke some processing in the CPU12 instruction >> processing. >> Fixed. >> Linker >> - -maps1 now maps 0x4000.0x7FFF as last_page-1 >> - Added -maps12x, maps 0x4000.0x7FFF as last_page-2 >> >> >> // richard >> On-line orders, support, >> and listservers available on web site. >> [ For technical support on ImageCraft products, please include all >> previous replies in your msgs. ] >> _______________________________________________ >> Icc-mot mailing list >> Icc-mot@imagecraft.com >> http://dragonsgate.net/mailman/listinfo/icc-mot >> >> > > -- > Gene Norris > Chief Engineer > > SPOT Engineering, Inc. > 1261 Campground Road > Lancaster, Ohio 43130 > 740.654.0880 > FAX.654.0889 > > http://www.spotengineering.com/ > > _______________________________________________ > Icc-mot mailing list > Icc-mot@imagecraft.com > http://dragonsgate.net/mailman/listinfo/icc-mot