[Icc-avr] Is there something wrong with this RTC interrupt?

[BobGardner at aol.com]

Have you tried just letting the 32768hz timer free run, arm the overflow  
int, the handler will be one instruction. Should be able to predict the  EXACT 
number of overflow counts per sec. As accurate as the xtal. What is watch  xtal 
accuracy? 10ppm?
 
 
In a message dated 1/4/2008 7:43:58 P.M. Eastern Standard Time,  
scottk at skelleyco.com writes:


>> Since you have obviously once done a lot of  assembler
programming...
Actually, I have not done Any assembly - it's  pretty much
just gibberish to me.  I have a moderate amount of  C
experience and understanding, but I know virtually nothing
about what  is going on once compiled.


I eliminated the CLI() and SEI()  instructions.  No change -
the RTC is still adding about .0026 seconds  to each minute.


That's almost 10,000 main clock cycles and about 85  RTC
cycles per minute.  Since there doesn't seem to be a  clear
connection to the number of RTC cycles, it does make sense
to me  that it is an error in the code execution rather than
in the RTC itself,  which I would expect to show up as some
multiple of 60 cycles per  minute.

So I'm still stumped.  Any other thoughts?

Here's  the code, including changes:

void rtc_init(void) {  // init timer  for 1 second interrupt
CLI(); //disable all interrupts - prevent errant  interrupts
until set up
TCCR0 &= ~(1<<WGM00); TCCR0 &=  ~(1<<WGM01); // Set timer for
normal operation  WGM00 = 0, WGM21  = 0
TCCR0 &= ~0x02; TCCR0 |= 0x05; // counter 0 prescaler =  128
CS02=1, CS01=0, CS00=1 (Timer Clock = 32,768 / TCCR2)
TIMSK &=  ~((1<<TOIE0)|(1<<OCIE0)); // Disable Timer0
Interrupt   TOIE0 = 0, OCIE0 = 0 
ASSR |= (1<<AS0);  //set Timer/Counter0  for asynchronous
operation - 32,768 Hz crystal  AS0 = 1   
TCNT0 = 0x00;
TIMSK |= (1<<TOIE0); // Enable Timer0 overflow  Interrupt
SEI(); //set the Global Interrupt Enable Bit  
}   //void rtc_init(void)


void timer0_overflow_isr(void) {  //  Clock ISR - overflow
occured TCNT2=OCR2
GeneralTimer++;
CommunicationsTimeout ++;
SecondFlag = 1;
WDTimerFlag =  1;
if (++second>59) { //keep track of time, date, month,  and
year
second=0;
MinuteFlag = 1;   // Additional clock service is now
passed back to the main code 
}
}  


> -----Original Message-----
> From:  icc-avr-bounces at imagecraft.com 
>  [mailto:icc-avr-bounces at imagecraft.com] On Behalf Of  John
Baraclough
> Sent: Friday, January 04, 2008 8:58 AM
> To:  Discussion list for ICCAVR and ICCtiny Users. You do
NOT 
> need  tosubscribe to icc-announce if you are a member of
this.
> Subject:  Re: [Icc-avr] Is there something wrong with this
RTC 
>  interrupt?
> 
> As Bob has said it is the SEI() at the end of  your
interrupt handler 
> that is probably the culprit. The purpose  of the '#pragma 
> interrupt_handler' is to force the compiler to put a  RETI 
> instruction at 
> the end of the function rather than a  normal RET. Have a
look at the 
> list file and see where the SEI()  instruction is in
comparison to the 
> RETI and you'll see the  problem immediately.
> 
> Since you have obviously once done a lot  of assembler
programming, it 
> would help you a great deal if you  downloaded  the AVR 
> instruction set 
> document from the  Atmel website:
>  
>
http://www.atmel.com/dyn/resources/prod_documents/doc0856.pd
f
>  
> 
> John
> 
> 
> 
> Scott Kelley  wrote:
> > I'm well in over my head with this stuff...
>  >  
> > I don't understand why cli does nothing...
>  >  
> > I've forgotten more than I ever knew about  machine
language... what 
> > would be occurring if "The second  one reenables ints
BEFORE 
> the regs 
> > are  popped"?  What would be the way to deal with this?
> >   
> 
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