[Icc-avr] Optimization of write and read to register STS, LDS

[Michael Dipperstein]

Bengt,

I haven't looked at the AVRfreaks application, but if you can put your
data in a structure and access it by pointer, the compiler will uses LDD
and STD.  The compiler will usually load the address of the pointer into
a register pair and then movw that value into the Z register, so you
need to do at least 3 load/store operations to break even.  I don't know
why the compiler doesn't just load the Z register directly.

Here are some samples I generated using 7.13A without optimizations:

typedef struct
{
    char field1;
	int field2;
	char field3;
} my_struct_t;

my_struct_t myStruct; 

void func1(void)
{
    myStruct.field2 = myStruct.field1 + myStruct.field3; 
}

void func2(void)
{
    my_struct_t *myPtr;

    myPtr = &myStruct;
    myPtr->field2 = myPtr->field1 + myPtr->field3; 
}

I got following for func1:

	lds R2,_myStruct+3
	clr R3
	lds R4,_myStruct
	clr R5
	add R4,R2
	adc R5,R3
	sts _myStruct+1+1,R5
	sts _myStruct+1,R4
	ret

And the following for func2:

	ldi R16,<_myStruct
	ldi R17,>_myStruct
	movw R30,R16
	ldd R2,z+3
	clr R3
	ldd R4,z+0
	clr R5
	add R4,R2
	adc R5,R3
	std z+2,R5
	std z+1,R4
	ret

-Mike

-----Original Message-----
From: icc-avr-bounces at imagecraft.com
[mailto:icc-avr-bounces at imagecraft.com] On Behalf Of Bengt Ragnemalm
Sent: Sunday, September 30, 2007 2:41 AM
To: Discussion list for ICCAVR and ICCtiny Users. You do NOT need
tosubscribe to icc-announce if you are a member of this.
Subject: [Icc-avr] Optimization of write and read to register STS, LDS

I am testing a size optimized osccal routine (RetroDan, AVRfreaks). It
is a
hint there about the possibility to optimize many STS and LDS
instructions
with LDD and STD (load and store with displacement).

It occured to me that why could a C-compiler not catch that possibility?
Or
maybe it would be possible to "fool" the compiler to use it anyway.

Regards,
Bengt

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